DC-biased Impedance Measurements Using an External Bias Tee

June 23, 2022 by Meng Li

A bias tee is often used in DC-biased impedance measurements. In fact, some impedance analyzers may have a built-in bias tee to allow the output of a sine wave with DC offset. Advanced ones such as the MFIA Impedance Analyzer, are further equipped with an analog adder path to add a DC bias or a low-frequency wave provided from another source. However, certain applications may need a DC bias higher than the instrument's damage threshold (detailed specs of MFIA can be found here). If this is the case, it is obviously safer to add the DC bias externally, preventing the measuring instrument from seeing such a bias. 

When using an external bias tee in an impedance measurement circuit, accuracy can become a great concern. The main reason is that the external bias tee is not taken into account by the internal calibration protocol of any impedance analyzer. There are two sources of error from the bias tee:

  1. The parasitic impedance. In the previous blog post, we demonstrated how to properly measure the impedance of a bias tee itself (Mini-Circuits ZFBT-4R2GW+) using the MFIA. Interestingly, we found that the impedance spectrum of the bias tee is complicated, and cannot be simplified into an L||C equivalent circuit. Nevertheless, the lump-sum parasitic impedance of the bias tee can be considered as in series with the device under test (DUT). Therefore, short compensation should be done to remove such an offset.
  2. The current dividing effect. If we look at the bias tee from the RF input, the DC input is in parallel with the DUT. As a result, a certain ratio of current may leak in this direction, rather than going out from the desired RF+DC output. This ratio may also change with the DUT impedance and the frequency, so it cannot be fixed by just a constant scaling factor. We would need a frequency-dependent scaling, also known as load compensation.

The Zurich Instruments LabOne® software offers a short-load compensation routine on the MFIA, which can be very useful to improve the measurement accuracy in this complex scenario. This blog post will walk you through the detailed steps.

DC-biased impedance measurement

Figure 1. Sketch showing a DC-biased impedance measurement setup.

We connect the bias tee to an MFIA and a DC source (meter), for example, Rohde&Schwarz R&S® NGU201, as shown in Figure 1. It is worth mentioning that only 2-terminal contact configuration is supported, as the DC bias that we intend to add is higher than the 3 V max input voltage range for the MFIA. Attention is also required to make sure that the absolute current is smaller than 10 mA under all conditions, to prevent overflowing the current input.

For a quick demonstration purpose, we choose a nominal 100 pF capacitor as our DUT, even though ideally its impedance does not have any dependence on the applied DC bias. We further constrict ourselves to the measurement at a single frequency or a few frequencies only. This is again because the impedance spectrum of the bias tee is complicated, with multiple resonance peaks appearing. Running a linear interpolation in the whole frequency range without enough data point granularity might lead to an even bigger error. To tackle this issue, an easy way is to precisely match the user compensated frequencies to the frequencies of interest. For example, if we only need to measure the impedance versus VDC at 100 kHz and 1 MHz, we can set up the user compensation as shown in Figure 2. Make sure to uncheck the 'Validation' button to slightly loosen the compensation standard, as the parasitic impedance of the bias tee may push the measured impedance out of tolerance (too much deviation from the setpoint at 0 or 1 kOhm). 

User compensation setup

Figure 2. LabOne screenshot of the calibration (CAL) tab of the impedance analyzer module. Note that the validation button should be switched off.

In Figure 3, we compare the internally biased measurement to externally biased measurements (with and without running user compensation), all taken at a fixed frequency of 1 MHz. In the internally biased case (red trace), as the 100 pF DUT is mounted on the MFITF carrier and plugged in directly, the accuracy remains the same as specified in MFIA's reactance chart, without additional need to set up a user compensation. We can measure up to 9 VDC, limited by the 10 V full range output (AC + DC), and see a very flat capacitance at 98.39 pF. With external bias, we can ramp up to 20 VDC (limited by the DC source). Higher voltage bias is also possible if needed, but both the bias tee and the DUT should be carefully chosen accordingly. Without running user compensation, the capacitance is 96.52 pF (green trace), which is 2% off from the value measured in the internally biased case. After we finish a short-load user compensation routine as described above, we can reach 98.42 pF. This simple compensation step helps us to effectively reduce the error to just 0.03%.

Result at 1 MHz

Figure 3. Comparison of the impedance measurements of internal bias (red), external bias (green), and external bias with user compensation (blue). All traces are taken at a fixed frequency of 1 MHz.

In this blog post, we have explained how to use a bias tee to add an external DC bias in an impedance measurement. A short-load user compensation, in a precise frequency match to our frequency of interest, is found to be a must in the setup. Thanks to the built-in user compensation routine in LabOne software, we can achieve this conveniently, reducing the measurement error from 2% to 0.03%.

If you are interested in a demo, please get in touch.